From 127f121ef257322f320ef8b745d1b648ec9f413b Mon Sep 17 00:00:00 2001 From: solomatnikov Date: Wed, 5 Apr 2017 08:29:45 -0700 Subject: [PATCH] Preserve id_do_fence (#651) --- src/main/scala/rocket/Rocket.scala | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/main/scala/rocket/Rocket.scala b/src/main/scala/rocket/Rocket.scala index 98e527d8..d860e6f7 100644 --- a/src/main/scala/rocket/Rocket.scala +++ b/src/main/scala/rocket/Rocket.scala @@ -217,8 +217,8 @@ class Rocket(implicit p: Parameters) extends CoreModule()(p) val id_rocc_busy = Bool(usingRoCC) && (io.rocc.busy || ex_reg_valid && ex_ctrl.rocc || mem_reg_valid && mem_ctrl.rocc || wb_reg_valid && wb_ctrl.rocc) - val id_do_fence = id_rocc_busy && id_ctrl.fence || - id_mem_busy && (id_ctrl.amo && id_amo_aq || id_ctrl.fence_i || id_reg_fence && (id_ctrl.mem || id_ctrl.rocc)) + val id_do_fence = Wire(init = id_rocc_busy && id_ctrl.fence || + id_mem_busy && (id_ctrl.amo && id_amo_aq || id_ctrl.fence_i || id_reg_fence && (id_ctrl.mem || id_ctrl.rocc))) val bpu = Module(new BreakpointUnit(nBreakpoints)) bpu.io.status := csr.io.status