diff --git a/chisel b/chisel
index 13f7e137..213d7d6f 160000
--- a/chisel
+++ b/chisel
@@ -1 +1 @@
-Subproject commit 13f7e13730657c370ab0a91f5bf046661f4a8359
+Subproject commit 213d7d6fc5a5d35c3665490b955a64aacf3a354d
diff --git a/hardfloat b/hardfloat
index ac7ec37a..d1269259 160000
--- a/hardfloat
+++ b/hardfloat
@@ -1 +1 @@
-Subproject commit ac7ec37adf725caf9291d813e46826a9a7cab22c
+Subproject commit d1269259151b25e7a7a1ddc22bf85b92cd732118
diff --git a/riscv-tests b/riscv-tests
index 6fdd12c1..e5d9d1af 160000
--- a/riscv-tests
+++ b/riscv-tests
@@ -1 +1 @@
-Subproject commit 6fdd12c130d0c0c13934364a4dfe12d8dcf28e27
+Subproject commit e5d9d1af2e54d50ff2756a8a868c6e7436739311
diff --git a/riscv-tools b/riscv-tools
index 76441991..3338089d 160000
--- a/riscv-tools
+++ b/riscv-tools
@@ -1 +1 @@
-Subproject commit 76441991a8669da66b0d4a716fdbfdf846888684
+Subproject commit 3338089dbd9da62784544b03630aa8df18bd89de
diff --git a/rocket b/rocket
index 42f215b3..08cd7342 160000
--- a/rocket
+++ b/rocket
@@ -1 +1 @@
-Subproject commit 42f215b37a89037be2065ada25d078409f81bcdb
+Subproject commit 08cd734296ff1bf11695a0adc80077bad4d0b57d
diff --git a/src/main/scala/RocketChip.scala b/src/main/scala/RocketChip.scala
index 3359ca21..8fe62eea 100644
--- a/src/main/scala/RocketChip.scala
+++ b/src/main/scala/RocketChip.scala
@@ -257,9 +257,7 @@ class Top extends Module {
   val vic = ICacheConfig(128, 1)
   val hc = hwacha.HwachaConfiguration(vic, 8, 256, ndtlb = 8, nptlb = 2)
   val rc = RocketConfiguration(tl, ic, dc,
-                               fpu = HAS_FPU,
-                               rocc = (c: RocketConfiguration) => (new hwacha.Hwacha(hc, c))
-                               )
+                               fpu = HAS_FPU)
 
   val io = new VLSITopIO(HTIF_WIDTH)