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rocket: change connection between rocketchip and coreplex

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* rtc and dtm are now crossed half-and-half on the two sides
* groundtest no longer uses riscv platform traits
This commit is contained in:
Wesley W. Terpstra
2016-11-15 18:27:52 -08:00
parent 2d68f12115
commit 10e459fedb
20 changed files with 370 additions and 349 deletions
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27
src/main/scala/rocketchip/ExampleTop.scala
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@ -12,31 +12,40 @@ import rocketchip._
class ExampleTop[+C <: BaseCoreplex](_coreplex: Parameters => C)(implicit p: Parameters) extends BaseTop(_coreplex)
with DirectConnection
with PeripheryBootROM
with PeripheryDebug
with PeripheryExtInterrupts
with PeripheryMasterAXI4Mem
with PeripheryMasterAXI4MMIO
with PeripherySlave {
with PeripheryMasterAXI4MMIO {
override lazy val module = new ExampleTopModule(this, () => new ExampleTopBundle(this))
}
class ExampleTopBundle[+L <: ExampleTop[BaseCoreplex]](_outer: L) extends BaseTopBundle(_outer)
with PeripheryBootROMBundle
with PeripheryDebugBundle
with PeripheryExtInterruptsBundle
with PeripheryMasterAXI4MemBundle
with PeripheryMasterAXI4MMIOBundle
with PeripherySlaveBundle
class ExampleTopModule[+L <: ExampleTop[BaseCoreplex], +B <: ExampleTopBundle[L]](_outer: L, _io: () => B) extends BaseTopModule(_outer, _io)
with DirectConnectionModule
with PeripheryBootROMModule
with PeripheryDebugModule
with PeripheryExtInterruptsModule
with PeripheryMasterAXI4MemModule
with PeripheryMasterAXI4MMIOModule
with PeripherySlaveModule
with HardwiredResetVector
class ExampleRocketTop[+C <: DefaultCoreplex](_coreplex: Parameters => C)(implicit p: Parameters) extends ExampleTop(_coreplex)
with PeripheryDTM
with PeripheryCounter
with HardwiredResetVector {
override lazy val module = new ExampleRocketTopModule(this, () => new ExampleRocketTopBundle(this))
}
class ExampleRocketTopBundle[+L <: ExampleRocketTop[DefaultCoreplex]](_outer: L) extends ExampleTopBundle(_outer)
with PeripheryDTMBundle
with PeripheryCounterBundle
with HardwiredResetVectorBundle
class ExampleRocketTopModule[+L <: ExampleRocketTop[DefaultCoreplex], +B <: ExampleRocketTopBundle[L]](_outer: L, _io: () => B) extends ExampleTopModule(_outer, _io)
with PeripheryDTMModule
with PeripheryCounterModule
with HardwiredResetVectorModule
/** Example Top with TestRAM */
class ExampleTopWithTestRAM[+C <: BaseCoreplex](_coreplex: Parameters => C)(implicit p: Parameters) extends ExampleTop(_coreplex)