declaring success on FPU for now

2012-02-14 19:11:57 -08:00
parent 297223a13c
commit 0ec7767c13
3 changed files with 151 additions and 24 deletions
--- a/rocket/src/main/scala/util.scala
+++ b/rocket/src/main/scala/util.scala
@ -71,6 +71,12 @@ object LFSR16
  }
 }

+object ShiftRegister
+{
+  def apply [T <: Data](n: Int, in: T): T =
+    if (n > 0) Reg(apply(n-1, in)) else in
+}
+
 object Mux1H 
 {
 //TODO: cloning in(0) is unsafe if other elements have different widths, but