tilelink2 Isolation: add enable signal (#368)
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@ -5,7 +5,7 @@ package uncore.tilelink2
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import Chisel._
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import Chisel._
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import chisel3.internal.sourceinfo.SourceInfo
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import chisel3.internal.sourceinfo.SourceInfo
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class TLIsolation(f: UInt => UInt) extends LazyModule
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class TLIsolation(f: (Bool, UInt) => UInt) extends LazyModule
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{
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{
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val node = TLAsyncIdentityNode()
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val node = TLAsyncIdentityNode()
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@ -13,9 +13,10 @@ class TLIsolation(f: UInt => UInt) extends LazyModule
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val io = new Bundle {
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val io = new Bundle {
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val in = node.bundleIn
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val in = node.bundleIn
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val out = node.bundleOut
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val out = node.bundleOut
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val iso = Bool(INPUT)
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}
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}
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def ISO[T <: Data](x: T): T = x.fromBits(f(x.asUInt))
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def ISO[T <: Data](x: T): T = x.fromBits(f(io.iso, x.asUInt))
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((io.in zip io.out) zip (node.edgesIn zip node.edgesOut)) foreach { case ((in, out), (edgeIn, edgeOut)) =>
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((io.in zip io.out) zip (node.edgesIn zip node.edgesOut)) foreach { case ((in, out), (edgeIn, edgeOut)) =>
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@ -52,9 +53,9 @@ object TLIsolation
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{
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{
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// applied to the TL source node; y.node := TLIsolation()(x.node)
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// applied to the TL source node; y.node := TLIsolation()(x.node)
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// f should insert an isolation gate between the input UInt and its result
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// f should insert an isolation gate between the input UInt and its result
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def apply(f: UInt => UInt)(x: TLAsyncOutwardNode)(implicit sourceInfo: SourceInfo): TLAsyncOutwardNode = {
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def apply(f: (Bool, UInt) => UInt)(x: TLAsyncOutwardNode)(implicit sourceInfo: SourceInfo): (TLAsyncOutwardNode, () => Bool) = {
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val iso = LazyModule(new TLIsolation(f))
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val iso = LazyModule(new TLIsolation(f))
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iso.node := x
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iso.node := x
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iso.node
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(iso.node, () => iso.module.io.iso)
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}
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}
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}
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}
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