diff --git a/src/main/scala/util/Misc.scala b/src/main/scala/util/Misc.scala
index fb34c3ef..d0d70275 100644
--- a/src/main/scala/util/Misc.scala
+++ b/src/main/scala/util/Misc.scala
@@ -4,21 +4,18 @@
 package freechips.rocketchip.util
 
 import Chisel._
-import chisel3.experimental.{ChiselAnnotation, RawModule}
+import chisel3.experimental.RawModule
 import freechips.rocketchip.config.Parameters
 import scala.math._
 
 class ParameterizedBundle(implicit p: Parameters) extends Bundle
 
 // TODO: replace this with an implicit class when @chisel unprotects dontTouchPorts
-trait DontTouch {
-  self: RawModule =>
+trait DontTouch { self: RawModule =>
 
   def dontTouch(data: Data): Unit = data match {
-     case agg: Aggregate =>
-       agg.getElements.foreach(dontTouch)
-     case elt: Element =>
-       annotate(ChiselAnnotation(elt, classOf[firrtl.Transform], "DONTtouch!"))
+     case agg: Aggregate => agg.getElements.foreach(dontTouch)
+     case elt: Element => chisel3.core.dontTouch(elt)
   }
 
   /** Marks every port as don't touch