riscv/rocket-chip
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Allow additional internal MMIO devices to be created without changing BaseConfig

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Howard Mao
2016-08-03 16:33:30 -07:00
parent cc0f8962fb
commit 0a85e92652
5 changed files with 33 additions and 21 deletions
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junctions/src/main/scala/addrmap.scala
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@ -125,6 +125,7 @@ class AddrMap(entriesIn: Seq[AddrMapEntry], val start: BigInt = BigInt(0)) exten
}
def apply(name: String): MemRegion = mapping(name)
def contains(name: String): Boolean = mapping.contains(name)
def port(name: String): Int = slavePorts(name)
def subMap(name: String): AddrMap = mapping(name).asInstanceOf[AddrMap]
def isInRegion(name: String, addr: UInt): Bool = mapping(name).containsAddress(addr)