From 0a6c05a5d87630e86bef166c4ceac2db5195633d Mon Sep 17 00:00:00 2001
From: Colin Schmidt <colins@eecs.berkeley.edu>
Date: Thu, 18 Aug 2016 15:52:06 -0700
Subject: [PATCH] connect top level interrupts to coreplex

---
 src/main/scala/RocketChip.scala | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/main/scala/RocketChip.scala b/src/main/scala/RocketChip.scala
index 43d5fa4f..ce7cb4ba 100644
--- a/src/main/scala/RocketChip.scala
+++ b/src/main/scala/RocketChip.scala
@@ -171,6 +171,8 @@ class Top(topParams: Parameters) extends Module with HasTopLevelParameters {
       asyncAxiFrom(io.bus_clk.get, io.bus_rst.get, io.bus_axi)
     else io.bus_axi)
 
+  coreplex.io.interrupts <> io.interrupts
+
   io.extra <> periphery.io.extra
   p(ConnectExtraPorts)(io.extra, coreplex.io.extra, p)
 }