From 09de2e279441b66805fb76d43106a728cb44c294 Mon Sep 17 00:00:00 2001
From: Yunsup Lee <yunsup@cs.berkeley.edu>
Date: Fri, 12 Sep 2014 18:06:20 -0700
Subject: [PATCH] compute number of outstanding misses for DRAMSideLLCNull

---
 src/main/scala/PublicConfigs.scala | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/main/scala/PublicConfigs.scala b/src/main/scala/PublicConfigs.scala
index 1cec5f69..c38b58f4 100644
--- a/src/main/scala/PublicConfigs.scala
+++ b/src/main/scala/PublicConfigs.scala
@@ -108,7 +108,7 @@ class DefaultConfig extends ChiselConfig {
           Module(new DRAMSideLLC_HasKnownBug(sets=512, ways=8, outstanding=16,
             refill_cycles=refill, tagLeaf=tag, dataLeaf=data))
         } else {
-          Module(new DRAMSideLLCNull(8, refill))
+          Module(new DRAMSideLLCNull(site(NReleaseTransactors)+site(NAcquireTransactors), refill))
         }
       }
       case BuildCoherenceMaster => (id: Int) => {