Refactor FP Classify
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@ -177,31 +177,6 @@ class FPInput(implicit p: Parameters) extends CoreBundle()(p) with HasFPUCtrlSig
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override def cloneType = new FPInput().asInstanceOf[this.type]
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override def cloneType = new FPInput().asInstanceOf[this.type]
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}
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}
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object ClassifyRecFN {
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def apply(expWidth: Int, sigWidth: Int, in: UInt) = {
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val sign = in(sigWidth + expWidth)
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val exp = in(sigWidth + expWidth - 1, sigWidth - 1)
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val sig = in(sigWidth - 2, 0)
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val code = exp(expWidth,expWidth-2)
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val codeHi = code(2, 1)
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val isSpecial = codeHi === UInt(3)
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val isHighSubnormalIn = exp(expWidth-2, 0) < UInt(2)
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val isSubnormal = code === UInt(1) || codeHi === UInt(1) && isHighSubnormalIn
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val isNormal = codeHi === UInt(1) && !isHighSubnormalIn || codeHi === UInt(2)
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val isZero = code === UInt(0)
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val isInf = isSpecial && !exp(expWidth-2)
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val isNaN = code.andR
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val isSNaN = isNaN && !sig(sigWidth-2)
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val isQNaN = isNaN && sig(sigWidth-2)
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Cat(isQNaN, isSNaN, isInf && !sign, isNormal && !sign,
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isSubnormal && !sign, isZero && !sign, isZero && sign,
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isSubnormal && sign, isNormal && sign, isInf && sign)
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}
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}
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case class FType(exp: Int, sig: Int) {
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case class FType(exp: Int, sig: Int) {
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def ieeeWidth = exp + sig
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def ieeeWidth = exp + sig
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def recodedWidth = ieeeWidth + 1
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def recodedWidth = ieeeWidth + 1
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@ -210,6 +185,26 @@ case class FType(exp: Int, sig: Int) {
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def isNaN(x: UInt) = x(sig + exp - 1, sig + exp - 3).andR
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def isNaN(x: UInt) = x(sig + exp - 1, sig + exp - 3).andR
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def isSNaN(x: UInt) = isNaN(x) && !x(sig - 2)
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def isSNaN(x: UInt) = isNaN(x) && !x(sig - 2)
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def classify(x: UInt) = {
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val sign = x(sig + exp)
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val code = x(exp + sig - 1, exp + sig - 3)
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val codeHi = code(2, 1)
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val isSpecial = codeHi === UInt(3)
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val isHighSubnormalIn = x(exp + sig - 3, sig - 1) < UInt(2)
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val isSubnormal = code === UInt(1) || codeHi === UInt(1) && isHighSubnormalIn
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val isNormal = codeHi === UInt(1) && !isHighSubnormalIn || codeHi === UInt(2)
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val isZero = code === UInt(0)
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val isInf = isSpecial && !code(0)
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val isNaN = code.andR
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val isSNaN = isNaN && !x(sig-2)
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val isQNaN = isNaN && x(sig-2)
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Cat(isQNaN, isSNaN, isInf && !sign, isNormal && !sign,
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isSubnormal && !sign, isZero && !sign, isZero && sign,
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isSubnormal && sign, isNormal && sign, isInf && sign)
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}
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// convert between formats, ignoring rounding, range, NaN
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// convert between formats, ignoring rounding, range, NaN
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def unsafeConvert(x: UInt, to: FType) = if (this == to) x else {
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def unsafeConvert(x: UInt, to: FType) = if (this == to) x else {
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val sign = x(sig + exp)
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val sign = x(sig + exp)
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@ -378,13 +373,8 @@ class FPToInt(implicit p: Parameters) extends FPUModule()(p) {
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val in = RegEnable(io.in.bits, io.in.valid)
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val in = RegEnable(io.in.bits, io.in.valid)
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val valid = Reg(next=io.in.valid)
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val valid = Reg(next=io.in.valid)
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val classify_s = ClassifyRecFN(sExpWidth, sSigWidth, maxType.unsafeConvert(in.in1, FType.S))
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val tag = !in.singleIn
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val classify_out = fLen match {
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val classify_out = (floatTypes.map(t => t.classify(maxType.unsafeConvert(in.in1, t))): Seq[UInt])(tag)
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case 32 => classify_s
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case 64 =>
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val classify_d = ClassifyRecFN(dExpWidth, dSigWidth, in.in1)
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Mux(in.singleIn, classify_s, classify_d)
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}
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val dcmp = Module(new hardfloat.CompareRecFN(maxExpWidth, maxSigWidth))
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val dcmp = Module(new hardfloat.CompareRecFN(maxExpWidth, maxSigWidth))
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dcmp.io.a := in.in1
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dcmp.io.a := in.in1
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