From 051acee76cd18b62c379e7cf6bccac11eba5941a Mon Sep 17 00:00:00 2001
From: Megan Wachs <megan@sifive.com>
Date: Fri, 7 Apr 2017 15:22:16 -0700
Subject: [PATCH] Debug: Fix off-by-1 for detecting nonexistent harts.

---
 src/main/scala/uncore/devices/debug/Debug.scala | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/main/scala/uncore/devices/debug/Debug.scala b/src/main/scala/uncore/devices/debug/Debug.scala
index b7f04b5b..f3c2431a 100644
--- a/src/main/scala/uncore/devices/debug/Debug.scala
+++ b/src/main/scala/uncore/devices/debug/Debug.scala
@@ -524,7 +524,7 @@ class TLDebugModuleInner(device: Device, getNComponents: () => Int)(implicit p:
     val unavailVec = Wire(init = Vec.fill(nComponents){false.B})
     unavailVec := io.debugUnavail
 
-    when (selectedHartReg > nComponents.U) {
+    when (selectedHartReg >= nComponents.U) {
       DMSTATUSRdData.allnonexistent := true.B
       DMSTATUSRdData.anynonexistent := true.B
     }.elsewhen (unavailVec(selectedHartReg)) {