riscv/rocket-chip
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PUM -> SUM

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This commit is contained in:
Andrew Waterman
2017-03-19 21:38:50 -07:00
parent 2a413e4496
commit 0380aed329
4 changed files with 4 additions and 13 deletions
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src/main/scala/tile/LegacyRoCC.scala
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@ -308,8 +308,6 @@ class TranslatorExample(implicit p: Parameters) extends RoCC()(p) {
ptw.req.valid := (state === s_ptw_req)
ptw.req.bits.addr := req_vpn
ptw.req.bits.store := Bool(false)
ptw.req.bits.fetch := Bool(false)
io.resp.valid := (state === s_resp)
io.resp.bits.rd := req_rd