riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

Broadcast: single-cycle response is possible

Browse Source
This commit is contained in:
Wesley W. Terpstra
2016-11-22 20:45:40 -08:00
parent 437be0f36a
commit 0097274ea3
1 changed files with 0 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
src/main/scala/uncore/tilelink2/Broadcast.scala
View File

@@ -19,7 +19,6 @@ class TLBroadcast(lineBytes: Int, numTrackers: Int = 4, bufferless: Boolean = fa
managerFn = { case Seq(mp) => managerFn = { case Seq(mp) =>
mp.copy( mp.copy(
endSinkId = numTrackers, endSinkId = numTrackers,
minLatency = 1,
managers = mp.managers.map { m => managers = mp.managers.map { m =>
// We are the last level manager // We are the last level manager
require (m.regionType != RegionType.CACHED) require (m.regionType != RegionType.CACHED)