70 lines
1.5 KiB
Markdown
70 lines
1.5 KiB
Markdown
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_Quick and dirty instructions:_
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Checkout The Code
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-----------------
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$ git submodule update --init --recursive
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Building The Toolchain
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----------------------
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To build RISC-V ISA simulator, frontend server, proxy kernel and newlib based GNU toolchain:
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$ export RISCV=/path/to/riscv/toolchain/installation
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$ cd riscv-tools
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$ ./build.sh
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To build asm tests and benchmarks (you must have the RISC-V toolchain installed and in your path):
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$ cd riscv-tests/isa/
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$ make -j
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$ cd riscv-tests/benchmarks
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$ make -j
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Building The Project
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--------------------
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To build the C simulator:
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$ cd emulator
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$ make
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To build the VCS simulator:
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$ cd vlsi/build/vcs-sim-rtl
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$ make
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in either case, you can run a set of assembly tests or simple benchmarks:
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$ make run-asm-tests
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$ make run-vecasm-tests
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$ make run-vecasm-timer-tests
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$ make run-bmarks-test
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To build a C simulator that is capable of VCD waveform generation:
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$ cd emulator
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$ make emulator-debug
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(note that you must have run `make emulator` at least once before
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running `make emulator-debug`)
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And to run the assembly tests on the C simulator and generate waveforms:
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$ make run-asm-tests-debug
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$ make run-vecasm-tests-debug
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$ make run-vecasm-timer-tests-debug
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$ make run-bmarks-test-debug
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Updating To A Newer Version Of Chisel
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-------------------------------------
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To grab a newer version of chisel:
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$ git submodule update --init
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$ cd chisel
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$ git pull origin master
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