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check RISCV envirnoment variable
2014-09-11 11:38:21 +02:00
# check RISCV environment variable
ifndef RISCV
$(error Please set environment variable RISCV. Please take a look at README)
endif
Write test harness in Chisel This is an unavoidably invasive commit, because it affects the unit tests (which formerly exited using stop()), the test harness Verilog generator (since it is no longer necessary), and the DRAM model (since it is no longer connected). However, this should substantially reduce the effort of building test harnesses in the future, since manual or semi-automatic Verilog writing should no longer be necessary. Furthermore, there is now very little duplication of effort between the Verilator and VCS test harnesses. This commit removes support for DRAMsim, which is a bit of an unfortunate consequence. The main blocker is the lack of Verilog parameterization for BlackBox. It would be straightforward to revive DRAMsim once support for that feature is added to Chisel and FIRRTL. But that might not even be necessary, as we move towards synthesizable DRAM models and FAME-1 transformations.
2016-08-16 07:03:03 +02:00
MODEL ?= TestHarness
Streamline makefiles for more robust test dependency generation. Note: emulator/generated-src-debug no longer used
2015-07-28 09:23:31 +02:00
PROJECT := rocketchip
respect environment's CXX
2015-08-25 22:26:14 +02:00
CXX ?= g++
Speed up C++ compilation
2014-01-31 21:25:19 +01:00
CXXFLAGS := -O1
everything to get emulator working
2012-10-02 04:30:11 +02:00
build: use local sbt when building firrtl
2016-05-25 20:36:24 +02:00
SBT ?= java -Xmx2G -Xss8M -XX:MaxPermSize=256M -jar $(base_dir)/sbt-launch.jar
Massive update containing several months of changes from the now-defunct private chip repo. * Adds support for a L2 cache with directory bits for tracking L1 coherence (DefaultL2Config), and new metadata-based coherence API. * Additional tests. * New virtual memory implementation, priviliged architecture (1.7), custom CSRs, FDivSqrt unit * Updated TileLink protocol, NASTI protocol SHIMs. * Lays groundwork for multiple top-level memory channels, superscalar fetch. * Bump all submodules.
2015-06-26 08:17:35 +02:00
SHELL := /bin/bash
everything to get emulator working
2012-10-02 04:30:11 +02:00
invoke firrtl jar directly in order to control heap memory usage
2016-06-20 20:18:47 +02:00
FIRRTL_JAR ?= $(base_dir)/firrtl/utils/bin/firrtl.jar
FIRRTL ?= java -Xmx2G -Xss8M -XX:MaxPermSize=256M -cp $(FIRRTL_JAR) firrtl.Driver
Add firrtl build dependencies Without this when I update firrtl the new version doesn't get built, so my build is constantly failing.
2016-08-05 23:45:00 +02:00
$(FIRRTL_JAR): $(shell find $(base_dir)/firrtl/src/main/scala -iname "*.scala")
invoke firrtl jar directly in order to control heap memory usage
2016-06-20 20:18:47 +02:00
$(MAKE) -C $(base_dir)/firrtl SBT="$(SBT)" root_dir=$(base_dir)/firrtl build-scala
Write test harness in Chisel This is an unavoidably invasive commit, because it affects the unit tests (which formerly exited using stop()), the test harness Verilog generator (since it is no longer necessary), and the DRAM model (since it is no longer connected). However, this should substantially reduce the effort of building test harnesses in the future, since manual or semi-automatic Verilog writing should no longer be necessary. Furthermore, there is now very little duplication of effort between the Verilator and VCS test harnesses. This commit removes support for DRAMsim, which is a bit of an unfortunate consequence. The main blocker is the lack of Verilog parameterization for BlackBox. It would be straightforward to revive DRAMsim once support for that feature is added to Chisel and FIRRTL. But that might not even be necessary, as we move towards synthesizable DRAM models and FAME-1 transformations.
2016-08-16 07:03:03 +02:00
CHISEL_ARGS := --targetDir $(generated_dir)
Streamline makefiles for more robust test dependency generation. Note: emulator/generated-src-debug no longer used
2015-07-28 09:23:31 +02:00
update for rocket-chip release
2014-09-01 05:26:55 +02:00
src_path = src/main/scala
reorganize moving non-submodule packages into src/main/scala
2016-08-19 19:58:56 +02:00
default_submodules = . hardfloat context-dependent-environments chisel3
chisel_srcs = $(foreach submodule,$(default_submodules) $(ROCKETCHIP_ADDONS),$(shell find $(base_dir)/$(submodule)/$(src_path) -name "*.scala"))
update for rocket-chip release
2014-09-01 05:26:55 +02:00
disasm := 2>
If you don't have spike-disasm in your path, your path is dumped to stdout by this line every time you do anything in the entire repo.
2015-09-04 00:36:11 +02:00
which_disasm := $(shell which spike-dasm 2> /dev/null)
update for rocket-chip release
2014-09-01 05:26:55 +02:00
ifneq ($(which_disasm),)
tease out reference-chip specific stuff
2014-09-10 05:49:28 +02:00
disasm := 3>&1 1>&2 2>&3 | $(which_disasm) $(DISASM_EXTENSION) >
update for rocket-chip release
2014-09-01 05:26:55 +02:00
endif
timeout_cycles = 100000000
generate BootROM contents from assembly code
2016-08-05 20:07:42 +02:00
bootrom_img = $(base_dir)/bootrom/bootrom.img
update for rocket-chip release
2014-09-01 05:26:55 +02:00
#--------------------------------------------------------------------
# Build Tests
#--------------------------------------------------------------------
%.hex:
$(MAKE) -C $(dir $@) $(notdir $@)
Support make-3.82 and newer make changed its priorties for resolving implicit rules, which causes different behavior when running "make run-bmark-tests". This patch changes the hex file rules to ensure they match between the two versions of make. I've tried this with both make-3.81 and make-4.1, and they both work for me.
2016-01-28 21:15:14 +01:00
%.riscv.hex: %.riscv
update for rocket-chip release
2014-09-01 05:26:55 +02:00
$(MAKE) -C $(dir $@) $(notdir $@)
use definitions in consts header whenever possible
2015-11-05 19:15:02 +01:00
#---------------------------------------------------------------------
# Constants Header Files
#---------------------------------------------------------------------
params_file = $(generated_dir)/$(MODEL).$(CONFIG).prm
consts_header = $(generated_dir)/consts.$(CONFIG).h
$(consts_header): $(params_file)
echo "#ifndef __CONST_H__" > $@
echo "#define __CONST_H__" >> $@
sed -r 's/\(([A-Za-z0-9_]+),([A-Za-z0-9_]+)\)/#define \1 \2/' $< >> $@
echo "#endif // __CONST_H__" >> $@
params_file_debug = $(generated_dir_debug)/$(MODEL).$(CONFIG).prm
consts_header_debug = $(generated_dir_debug)/consts.$(CONFIG).h
$(consts_header_debug): $(params_file_debug)
echo "#ifndef __CONST_H__" > $@
echo "#define __CONST_H__" >> $@
sed -r 's/\(([A-Za-z0-9_]+),([A-Za-z0-9_]+)\)/#define \1 \2/' $< >> $@
echo "#endif // __CONST_H__" >> $@
make sure all regressions actually run
2016-08-10 20:40:58 +02:00
clean-run-output:
rm -f $(output_dir)/{*.out,*.run,*.vpd}
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