12 lines
521 B
Plaintext
12 lines
521 B
Plaintext
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# groundtest
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A memory tester circuit for Rocket Chip's memory system. The generator tile
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plugs into the existing SoC generator as what looks like a CPU. However,
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instead of running programs, the tile generates fixed memory requests out to
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the L2. There are both cached and uncached generators. The cached generator
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has an intervening L1 cache, the uncached generator sends TileLink requests
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directly to the L2.
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Assertions are set to fail if the wrong data comes back or if a request times
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out waiting for the response.
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