riscv/freedom
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base: riscv:e57dfd0f6300a2fcd6febe546c3e6d655a51ba08
Branches Tags
riscv:ml507
riscv:boot-test
riscv:master
..
compare: riscv:4f950772a1016dda4475d19851724edfa4f17666
Branches Tags
riscv:ml507
riscv:boot-test
riscv:master

No commits in common. "e57dfd0f6300a2fcd6febe546c3e6d655a51ba08" and "4f950772a1016dda4475d19851724edfa4f17666" have entirely different histories.
e57dfd0f63 ... 4f950772a1

3 changed files with 4 additions and 5 deletions
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2
fpga-shells

@ -1 +1 @@
Subproject commit 79b53cf2ae2478f20ef9716ed0b63444ee7e48d3
Subproject commit 5bcc4e82fdc65bcd25c92e4f11a9c8421bacdea8

2
rocket-chip

@ -1 +1 @@
Subproject commit 6df42fc36078d6ff60c1610b6fb89b24d668f134
Subproject commit 4ba8acb4aa26901899963136704d065a22e36460

5
src/main/scala/unleashed/u500ml507devkit/FPGAChip.scala
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@ -55,10 +55,9 @@ class U500ML507DevKitFPGAChip(implicit override val p: Parameters)
GPIOPinsFromPort(gpio_pins, dut.gpio(0))
gpio_pins.pins.foreach { _.i.ival := Bool(false) }
gpio_pins.pins.zipWithIndex.foreach {
case(pin, idx) =>
pin.i.ival := dip(idx)
led(idx) := pin.o.oval
case(pin, idx) => led(idx) := pin.o.oval
}
}