From df44d1a3bc03d4f9d9106dfbfeaed034ca927a20 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Klemens=20Sch=C3=B6lhorn?= <klemens@schoelhorn.eu>
Date: Tue, 1 May 2018 00:09:14 +0200
Subject: [PATCH] Make DIP switches available as GPIO register

---
 fpga-shells                                             | 2 +-
 src/main/scala/unleashed/u500ml507devkit/FPGAChip.scala | 5 +++--
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/fpga-shells b/fpga-shells
index 5bcc4e8..79b53cf 160000
--- a/fpga-shells
+++ b/fpga-shells
@@ -1 +1 @@
-Subproject commit 5bcc4e82fdc65bcd25c92e4f11a9c8421bacdea8
+Subproject commit 79b53cf2ae2478f20ef9716ed0b63444ee7e48d3
diff --git a/src/main/scala/unleashed/u500ml507devkit/FPGAChip.scala b/src/main/scala/unleashed/u500ml507devkit/FPGAChip.scala
index 03d2b73..4a4ca26 100644
--- a/src/main/scala/unleashed/u500ml507devkit/FPGAChip.scala
+++ b/src/main/scala/unleashed/u500ml507devkit/FPGAChip.scala
@@ -55,9 +55,10 @@ class U500ML507DevKitFPGAChip(implicit override val p: Parameters)
 
     GPIOPinsFromPort(gpio_pins, dut.gpio(0))
 
-    gpio_pins.pins.foreach { _.i.ival := Bool(false) }
     gpio_pins.pins.zipWithIndex.foreach {
-      case(pin, idx) => led(idx) := pin.o.oval
+      case(pin, idx) =>
+        pin.i.ival := dip(idx)
+        led(idx) := pin.o.oval
     }
   }