18 lines
632 B
Makefile
18 lines
632 B
Makefile
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# See LICENSE for license details.
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base_dir := $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))
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BUILD_DIR := $(base_dir)/builds/e300artydevkit
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FPGA_DIR := $(base_dir)/fpga/e300artydevkit
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MODEL := E300ArtyDevKitTop
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PROJECT := sifive.freedom.everywhere.e300artydevkit
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CONFIG_PROJECT := sifive.freedom.everywhere.e300artydevkit
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CONFIG := E300ArtyDevKitConfig
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rocketchip_dir := $(base_dir)/rocket-chip
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sifiveblocks_dir := $(base_dir)/sifive-blocks
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EXTRA_FPGA_VSRCS := \
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$(rocketchip_dir)/vsrc/AsyncResetReg.v \
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$(rocketchip_dir)/vsrc/DebugTransportModuleJtag.v \
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$(sifiveblocks_dir)/vsrc/SRLatch.v
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include common.mk
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