diff --git a/src/main/scala/shell/xilinx/ML507Shell.scala b/src/main/scala/shell/xilinx/ML507Shell.scala
index 158c422..27e0035 100644
--- a/src/main/scala/shell/xilinx/ML507Shell.scala
+++ b/src/main/scala/shell/xilinx/ML507Shell.scala
@@ -105,8 +105,6 @@ abstract class ML507Shell(implicit val p: Parameters) extends RawModule {
   // UART
   val uart_tx              = IO(Output(Bool()))
   val uart_rx              = IO(Input(Bool()))
-  val uart_rtsn            = IO(Output(Bool()))
-  val uart_ctsn            = IO(Input(Bool()))
 
   // SDIO
   val sdio_clk             = IO(Output(Bool()))
@@ -225,8 +223,6 @@ abstract class ML507Shell(implicit val p: Parameters) extends RawModule {
   // UART
   //-----------------------------------------------------------------------
 
-  uart_rtsn := false.B
-
   def connectUART(dut: HasPeripheryUARTModuleImp): Unit = {
     val uartParams = p(PeripheryUARTKey)
     if (!uartParams.isEmpty) {