#define F_CPU 20000000UL
#include <stdint.h>
#include <avr/io.h>
#include <util/delay.h>
#define BAUD 9600
#include <util/setbaud.h>




void uart_init(void) {
    #define BAUDRATE ((F_CPU)/(BAUD*8UL)-1) // set baud rate value for UBRR
    UBRR0H = (BAUDRATE>>8);  // shift the register right by 8 bits to get the upper 8 bits
    UBRR0L = BAUDRATE;       // set baud rate
	
	// UCSR0A |= (1 << U2X0);   // double transmission speed
	// UCSR0B = (1 << TXEN0) | (1 << RXEN0);
    // UCSR0C = (1 << UCSZ01) | (1 << UCSZ00);
    
	// UBRR0H = UBRRH_VALUE;
    // UBRR0L = UBRRL_VALUE;
    

	UCSR0A |= _BV(U2X0);
	// UCSR0A &= ~(_BV(U2X0));


    // UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); /* 8-bit data */
    UCSR0C = 0x06; /* 8-bit data */
    UCSR0B = _BV(RXEN0) | _BV(TXEN0) | _BV(RXCIE0);   /* Enable RX and TX */

     
}

/*
// f=20MHz -> T=0,05 µs
uint8_t T0H = 6;  // == 0.3  µs ~ 0.4 µs (+- 150ns) == [0.25, 0.55] µs
uint8_t T1H = 14; // == 0.7  µs ~ 0.8 µs (+- 150ns) == [0.65, 0.95] µs
uint8_t T0L = 15; // == 0.75 µs ~ 0.85µs (+- 150ns) == [0.70, 1.00] µs
uint8_t T1L = 8;  // == 0.35 µs ~ 0.45µs (+- 150ns) == [0.30, 0.60] µs
uint8_t RES = 51; //  > 50   µs
*/

#define wait6 __asm__("nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t")
#define wait8 __asm__("nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t")
#define wait14 __asm__("nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t")
#define wait15 __asm__("nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t""nop\n\t")

uint8_t const CMAX = 32;

inline void writeZero() {
	PORTC = 1;
	wait6;
	PORTC = 0;
	wait15;
}

inline void writeOne() {
	PORTC = 1;
	wait14;
	PORTC = 0;
	wait8;
}

int  main() {
	DDRC = 1; // PORT C0 output
	// uart_init();
	
	do{
		// for( int i = 0; i < 7; i++) {
		//	if( i%2==0){
				writeZero();writeZero();writeZero();writeZero();writeZero();writeZero();writeZero();writeOne();
				writeZero();writeZero();writeZero();writeZero();writeZero();writeZero();writeZero();writeZero();
				writeZero();writeZero();writeZero();writeZero();writeZero();writeZero();writeZero();writeZero();
		//	} else {
				writeZero();writeZero();writeZero();writeZero();writeZero();writeZero();writeZero();writeZero();
				writeZero();writeZero();writeZero();writeZero();writeZero();writeZero();writeZero();writeZero();
				writeZero();writeZero();writeZero();writeZero();writeZero();writeZero();writeZero();writeZero();
		//	}
			
		// }		
		_delay_ms(500);

		
		// loop_until_bit_is_set(UCSR0A, UDRE0);
		// UDR0 = 'D'; 
	
	}while(1);
}

int main2( void )
{
    DDRC = 0xff; // (1 << PC0);

    while(1) {
        PORTC ^= 0xff; //(1 << PC0);
        _delay_ms(1000);
    }
    return 0;
}